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Synopsys and TSMC Collaborate to Develop Portfolio of DesignWare IP for TSMC 5nm FinFET Plus (N5P) Process

Interface and Foundation IP Enables Next Wave of Low-Power Mobile and High-Performance Cloud Computing SoCs on TSMC's N5P ProcessMOUNTAIN VIEW, California, Nov. 12, 2019 /PRNewswire/ -- Highlights:

DesignWare PHY IP in development on TSMC's N5P process includes USB, DisplayPort, DDR, LPDDR, HBM, PCI Express, Ethernet, MIPI, and HDMI



DesignWare Foundation IP on TSMC's N5P process encompasses high-speed, area-optimized, and low-power embedded memories, logic libraries, and one-time programmable non-volatile memory



STAR Memory Systema?? with new algorithms targeting 5nm FinFET-based transistor defects allow efficient test, repair, and diagnostics of embedded memories

Synopsys, Inc.A (Nasdaq: SNPS) today announced a collaboration with TSMC to develop a broad portfolio of DesignWare interface IP, logic libraries, embedded memories, and one-time programmable (OTP) non-volatile memory (NVM) IP on TSMC's 5-nanometer (nm) FinFET Plus (N5P) Process. The DesignWare IP solutions for TSMC's N5 process will enable designers to achieve aggressive performance, density, and power targets for their mobile and cloud computing designs. This collaboration reinforces the longstanding relationship between the two companies to provide designers with the high-quality IP needed to lower risk, differentiate their system-on-chips (SoCs), and accelerate their time-to-market."For nearly two decades, TSMC has been collaborating closely with Synopsys to help our mutual customers accelerate their time to volume by providing a broad range of proven DesignWare IP on TSMC's most advanced processes," said Suk Lee, senior director of the Design Infrastructure Management Division at TSMC. "We're pleased with the results of our collaboration in enabling designers to achieve an acceleration on their advanced mobile and cloud computing SoCs while gaining the full performance and power benefits of TSMC's newest and industry-leading process technology."
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